As a technique examined by the present inventors, for example, the following technique is conceivable in a semiconductor device including a phase change memory. A storage element uses a Ge—Sb—Te based or Ag—In—Sb—Te based chalcogenide material (or phase change material) containing at least antimony (Sb) and tellurium (Te) as a material of a storage layer. Further, a diode is used as a selection element. The characteristics of a phase change memory using a chalcogenide material and a diode are described in, for example, “IEEE International Solid-State Circuits Conference, Digest of Technical Papers”, USA, 2007, pp. 472-473.
FIG. 3 is a graph illustrating a relationship between a pulse width and a temperature which are required for phase change of a resistive storage element using a phase change material. When storage information “0” is written in the resistive storage element, such a reset pulse as to heat the element up to a melting point Ta of a chalcogenide material or higher and to rapidly cool the same is applied to the device, as illustrated in FIG. 3. By setting a short cooling time t1, for example, of about 1 ns, the chalcogenide material is changed to a high-resistance amorphous (noncrystalline) state.
On the contrary, when storage information “1” is written, the chalcogenide material is changed to a poly crystal state at a low resistance by applying such a set pulse as to hold the temperature of the resistive storage element in a temperature range lower than the melting point Ta and higher than a crystallization temperature Tx that is higher than or equal to a glass-transition temperature. A time t2 required for crystallization varies depending on the composition of the chalcogenide material. The temperature of the device illustrated in FIG. 3 depends on Joule heat generated from the storage element itself and on thermal diffusion to the environment surroundings.
As the size of the structure of the resistive storage element is decreased in the phase change memory, electric power required for the change of the state of the phase change film is decreased. Therefore, the structure tends to be decreased, in principle, as described in “IEEE International Electron Devices meeting, TECHNICAL DIGEST” (USA), 2001, pp. 803-806.
Further, “IEEE International Solid-State Circuits Conference, Digest of Technical Paper” (USA) 2004, SESSION 2/NON-VOLATILE MEMORY, p. 1-2 describes a phase change memory requiring about 120 ns for lowering the resistance and about 500 ns for increasing the resistance of the chalcogenide material
Further, Japanese Unexamined Patent Publication No. 2006-24355, Japanese Unexamined Patent Publication No. 2008-27522, and Japanese Unexamined Patent Publication No. 2009-193629 show programming methods for phase change memory devices.